Schaeffler FPGA: Rozdiel medzi revíziami
Z SensorWiki
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| Riadok 15: | Riadok 15: | ||
Takto sa vkladajú zdrojáky: | Takto sa vkladajú zdrojáky: | ||
| + | |||
| + | <source lang="vhdl"> | ||
| + | Q <= tmp; | ||
| + | QBAR <= not tmp; | ||
| + | </source> | ||
<tabs> | <tabs> | ||
| Riadok 24: | Riadok 29: | ||
entity SR_FF is | entity SR_FF is | ||
| − | PORT( S,R,CLOCK: in std_logic; | + | PORT( S,R,CLOCK: in std_logic; |
| − | Q, QBAR: out std_logic); | + | Q, QBAR: out std_logic); |
end SR_FF; | end SR_FF; | ||
Architecture behavioral of SR_FF is | Architecture behavioral of SR_FF is | ||
| + | |||
begin | begin | ||
| − | PROCESS(CLOCK) | + | PROCESS(CLOCK) |
| − | variable tmp: std_logic; | + | variable tmp: std_logic; |
| − | begin | + | begin |
| − | if(CLOCK='1' and CLOCK'EVENT) then | + | if(CLOCK='1' and CLOCK'EVENT) then |
| − | if(S='0' and R='0')then | + | if(S='0' and R='0')then |
| − | tmp:=tmp; | + | tmp:=tmp; |
| − | elsif(S='1' and R='1')then | + | elsif(S='1' and R='1')then |
| − | tmp:='Z'; | + | tmp:='Z'; |
| − | elsif(S='0' and R='1')then | + | elsif(S='0' and R='1')then |
| − | tmp:='0'; | + | tmp:='0'; |
| − | else | + | else |
| − | tmp:='1'; | + | tmp:='1'; |
| − | end if; | + | end if; |
| − | end if; | + | end if; |
| − | Q <= tmp; | + | |
| − | QBAR <= not tmp; | + | Q <= tmp; |
| + | QBAR <= not tmp; | ||
| + | |||
end PROCESS; | end PROCESS; | ||
| + | |||
end behavioral; | end behavioral; | ||
Verzia zo dňa a času 08:57, 27. november 2023
Takto sa sem píše obyčajný text.
Takto tučný, takto kurzíva.
Linky:
- Interné: Schaeffler Modul 3A
- Externé: nRF51 Series Reference Manual (Version 3.0)
Obrázok vložíš takto:
Súbor:FPGAchip.jpg
všimni si, že je nektívny a treba ho potom nahrať kliknutím na odkaz.
Takto sa vkladajú zdrojáky:
Q <= tmp;
QBAR <= not tmp;
library ieee;
use ieee. std_logic_1164.all;
use ieee. std_logic_arith.all;
use ieee. std_logic_unsigned.all;
entity SR_FF is
PORT( S,R,CLOCK: in std_logic;
Q, QBAR: out std_logic);
end SR_FF;
Architecture behavioral of SR_FF is
begin
PROCESS(CLOCK)
variable tmp: std_logic;
begin
if(CLOCK='1' and CLOCK'EVENT) then
if(S='0' and R='0')then
tmp:=tmp;
elsif(S='1' and R='1')then
tmp:='Z';
elsif(S='0' and R='1')then
tmp:='0';
else
tmp:='1';
end if;
end if;
Q <= tmp;
QBAR <= not tmp;
end PROCESS;
end behavioral;
from microbit import *
uart.init(baudrate=115200, bits=8, parity=None, stop=1)
while True:
accX = accelerometer.get_x()
uart.write('%d\r\n' % (accX))
sleep(100)
display.set_pixel(1,1,5)
sleep(100)
display.set_pixel(1,1,0)
A takto kľučové slová