Operácie

Procesory ARM: Rozdiel medzi revíziami

Zo stránky SensorWiki

← Predchádzajúca úprava
Balogh (diskusia | príspevky)
sensor, team1
7 728 editací
Balogh (diskusia | príspevky)
sensor, team1
7 728 editací
Bez shrnutí editace
 
(4 medziľahlé úpravy od rovnakého používateľa nie sú zobrazené.)
Riadok 4: Riadok 4:
* https://embedded.fel.cvut.cz/
* https://embedded.fel.cvut.cz/


== Comparison of Cortex-M Architectures ==
{| class="wikitable" style="text-align:center;"
|- style="font-weight:bold;"
! style="font-weight:normal; text-align:left;" |
! style="background-color:#ffffc7; color:#329a9d;" | M0
! style="background-color:#ffffc7; color:#329a9d;" | M0+
! style="background-color:#ffffc7; color:#329a9d;" | M1
! style="background-color:#ffffc7; color:#329a9d;" | M3
! style="background-color:#ffffc7; color:#329a9d;" | M4
! style="background-color:#ffffc7; color:#329a9d;" | M7
|-
| style="font-weight:bold; text-align:left;" | ARM Architecture
| ARMv6-M
| ARMv6-M
| ARMv6-M
| ARMv7-M
| ARMv7E-M
| ARMv7E-M
|-
| style="font-weight:bold;" | Pipeline
| 3-Stage
| 2-Stage
| 3-Stage
| 3-Stage <br />+ branch speculation
| 3-Stage <br />+ branch speculation
| 6-Stage <br />+ branch speculation
|-
| style="font-weight:bold;" | Architecture
| von Neumann
| von Neumann
| von Neumann
| Harvard
| Harvard
| Harvard
|-
| style="font-weight:bold;" | Functions:
| Optimised for <br />physical silicon <br />die size + cost
| Superset of M0
| Optimized core<br />designed to be loaded <br />into  FPGA chips.
| All Thumb <br />instructions
| Essentially M3 + DSP
| High performance, <br />~2x efficiency of M4
|-
| style="text-align:left;" |
| Supports Thumb-1 <br />and some of Thumb-2
| Optional MTB <br />(micro trace buffer)
|
| H/W divide
| DSP: MAC + SIMD
| Superscaler
|-
| style="text-align:left;" |
|
| Optional MPU <br />(memory protection unit)
|
| Saturation arithmetic
| Optional FPU
| 64-Bit Instruction <br />+ Data buses
|- style="text-align:left;"
|
|
|
|
| style="text-align:center;" | Optional MPU <br />(memory protection unit)
| style="text-align:center;" | Optional MPU <br />(memory protection unit)
|
|}
*Most information here taken from https://en.wikipedia.org/wiki/ARM_Cortex-M*


Vysvetlivky:
Vysvetlivky:
Riadok 67: Riadok 139:
** Blue Pill STM32F103C8T6 (a) (Cortex M3 @72 MHz, vrátane klonu [https://techfun.sk/produkt/vyvojova-doska-arm-stm32f103c8t6/ CKS32F103C8T6 z Techfun.SK])
** Blue Pill STM32F103C8T6 (a) (Cortex M3 @72 MHz, vrátane klonu [https://techfun.sk/produkt/vyvojova-doska-arm-stm32f103c8t6/ CKS32F103C8T6 z Techfun.SK])
*** CMSIS priklady tu: https://github.com/sandynomike?tab=repositories
*** CMSIS priklady tu: https://github.com/sandynomike?tab=repositories
*** CMSIS tu https://mcturra2000.wordpress.com/2021/11/18/using-cmsis-and-systick-to-blink-an-led-on-an-stm32f4/
*** mbedOS https://os.mbed.com/users/hudakz/code/mbed-os-bluepill/
*** mbedOS https://os.mbed.com/users/hudakz/code/mbed-os-bluepill/


** Black Pill STM32F411CEU6 (a) (Cortex M4 @100 MHz, aj z [https://techfun.sk/produkt/stm32f411ceu6-vyvojova-doska-32-bit-100mhz/ Techfun.SK]
** Black Pill STM32F411CEU6 (a) (Cortex M4 @100 MHz, aj z [https://techfun.sk/produkt/stm32f411ceu6-vyvojova-doska-32-bit-100mhz/ Techfun.SK]
*** Priklady od bare bone po HAL: https://www.codeinsideout.com/blog/stm32/blink/
*** Priklady od bare bone po HAL: https://www.codeinsideout.com/blog/stm32/blink/
 
*** CMSIS tu https://mcturra2000.wordpress.com/2021/11/18/using-cmsis-and-systick-to-blink-an-led-on-an-stm32f4/
*** BareBone tu https://github.com/lowbyteproductions/bare-metal-series/  (GCC and libopencm3)


* '''Nucleo boards'''
* '''Nucleo boards'''

Aktuálna revízia z 10:30, 7. august 2023

Všeobecné informácie


Comparison of Cortex-M Architectures

M0 M0+ M1 M3 M4 M7
ARM Architecture ARMv6-M ARMv6-M ARMv6-M ARMv7-M ARMv7E-M ARMv7E-M
Pipeline 3-Stage 2-Stage 3-Stage 3-Stage
+ branch speculation 		3-Stage
+ branch speculation 		6-Stage
+ branch speculation
Architecture von Neumann von Neumann von Neumann Harvard Harvard Harvard
Functions: Optimised for
physical silicon
die size + cost 		Superset of M0 Optimized core
designed to be loaded
into FPGA chips. 		All Thumb
instructions 		Essentially M3 + DSP High performance,
~2x efficiency of M4
Supports Thumb-1
and some of Thumb-2 		Optional MTB
(micro trace buffer) 		H/W divide DSP: MAC + SIMD Superscaler
Optional MPU
(memory protection unit) 		Saturation arithmetic Optional FPU 64-Bit Instruction
+ Data buses
Optional MPU
(memory protection unit) 		Optional MPU
(memory protection unit)


Vysvetlivky:

  • (m) - Matlab / Simulink Support Package Available
  • (M) - Matlab / Simulink Support Package Available and Tested
  • (-S) zatial neexistuje podpora pre Simulink
  • (mbed) - mbedOS available (v2 - version 2), (v5, v6) verzia
  • (+A,a) - Arduino programming possible, tested/not tested

mbedOS

Procesory Nordic Semiconductor


Procesory NXP

Rozličné FRDM dosky, doplň prehľad

  • FRDM KL-25Z (M),(mbed) - Cortex M0+


Procesory STM32

Marking: 

STM	Manufacturer (STMicroelectronics) 	—-
32     32-bit MCU 	                        —- 
 F     Type of MCU 	                        F: Mainstream, L: Low power, H: High Performance, W: Wireless, C: Cost effective
 1	ARM Core Type 	                        0: M0, 1: M3, 2: M3, 3: M4, 4: M4, 7: M7
03     Line of MCU 	                        Details about speed, peripherals, Silicon Process, etc.
 C     No. of Pins 	                        F: 20, G: 28, K: 32, T: 36, S: 44, C: 48, R: 64,66, V: 100, Z: 144, I: 176
 8     Flash Size 	                        4: 16, 6: 32, 8: 64, B: 128, C: 256, D: 384, E: 512, F: 768, G: 1024, H: 1536, I: 2048 KB
 T     Package 	                        P: TSOOP, H: BGA, U: VFQFPN, T: LQFP, Y: WLCSP
 6     Temperature Range 	                6: -40°C to 85°C, 7: -40°C to 105°C

Programovanie:

Courses:

Zdroj: „https://senzor.robotika.sk/sensorwiki/index.php?title=Procesory_ARM&oldid=14851“